STM32F0 Standard Peripheral bibliotheek  1.0
ST Microelectronics standard peripheral bibliotheek documentatie voor de STM32F0 familie
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RCC driver modules. More...

Modules

 RCC_Exported_Constants
 
 RCC_Private_Functions
 

Data Structures

struct  RCC_ClocksTypeDef
 

Macros

#define FLAG_MASK   ((uint8_t)0x1F)
 
#define CR_BYTE2_ADDRESS   ((uint32_t)0x40021002)
 
#define CFGR_BYTE3_ADDRESS   ((uint32_t)0x40021007)
 
#define CIR_BYTE1_ADDRESS   ((uint32_t)0x40021009)
 
#define CIR_BYTE2_ADDRESS   ((uint32_t)0x4002100A)
 

Functions

void RCC_DeInit (void)
 Resets the RCC clock configuration to the default reset state. More...
 
void RCC_HSEConfig (uint8_t RCC_HSE)
 Configures the External High Speed oscillator (HSE). More...
 
ErrorStatus RCC_WaitForHSEStartUp (void)
 Waits for HSE start-up. More...
 
void RCC_AdjustHSICalibrationValue (uint8_t HSICalibrationValue)
 Adjusts the Internal High Speed oscillator (HSI) calibration value. More...
 
void RCC_HSICmd (FunctionalState NewState)
 Enables or disables the Internal High Speed oscillator (HSI). More...
 
void RCC_AdjustHSI14CalibrationValue (uint8_t HSI14CalibrationValue)
 Adjusts the Internal High Speed oscillator for ADC (HSI14) calibration value. More...
 
void RCC_HSI14Cmd (FunctionalState NewState)
 Enables or disables the Internal High Speed oscillator for ADC (HSI14). More...
 
void RCC_HSI14ADCRequestCmd (FunctionalState NewState)
 Enables or disables the Internal High Speed oscillator request from ADC. More...
 
void RCC_LSEConfig (uint32_t RCC_LSE)
 Configures the External Low Speed oscillator (LSE). More...
 
void RCC_LSEDriveConfig (uint32_t RCC_LSEDrive)
 Configures the External Low Speed oscillator (LSE) drive capability. More...
 
void RCC_LSICmd (FunctionalState NewState)
 Enables or disables the Internal Low Speed oscillator (LSI). More...
 
void RCC_PLLConfig (uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
 Configures the PLL clock source and multiplication factor. More...
 
void RCC_PLLCmd (FunctionalState NewState)
 Enables or disables the PLL. More...
 
void RCC_PREDIV1Config (uint32_t RCC_PREDIV1_Div)
 Configures the PREDIV1 division factor. More...
 
void RCC_ClockSecuritySystemCmd (FunctionalState NewState)
 Enables or disables the Clock Security System. More...
 
void RCC_MCOConfig (uint8_t RCC_MCOSource)
 Selects the clock source to output on MCO pin (PA8). More...
 
void RCC_SYSCLKConfig (uint32_t RCC_SYSCLKSource)
 Configures the system clock (SYSCLK). More...
 
uint8_t RCC_GetSYSCLKSource (void)
 Returns the clock source used as system clock. More...
 
void RCC_HCLKConfig (uint32_t RCC_SYSCLK)
 Configures the AHB clock (HCLK). More...
 
void RCC_PCLKConfig (uint32_t RCC_HCLK)
 Configures the APB clock (PCLK). More...
 
void RCC_ADCCLKConfig (uint32_t RCC_ADCCLK)
 Configures the ADC clock (ADCCLK). More...
 
void RCC_CECCLKConfig (uint32_t RCC_CECCLK)
 Configures the CEC clock (CECCLK). More...
 
void RCC_I2CCLKConfig (uint32_t RCC_I2CCLK)
 Configures the I2C1 clock (I2C1CLK). More...
 
void RCC_USARTCLKConfig (uint32_t RCC_USARTCLK)
 Configures the USART1 clock (USART1CLK). More...
 
void RCC_GetClocksFreq (RCC_ClocksTypeDef *RCC_Clocks)
 Returns the frequencies of the System, AHB and APB busses clocks. More...
 
void RCC_RTCCLKConfig (uint32_t RCC_RTCCLKSource)
 Configures the RTC clock (RTCCLK). More...
 
void RCC_RTCCLKCmd (FunctionalState NewState)
 Enables or disables the RTC clock. More...
 
void RCC_BackupResetCmd (FunctionalState NewState)
 Forces or releases the Backup domain reset. More...
 
void RCC_AHBPeriphClockCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
 Enables or disables the AHB peripheral clock. More...
 
void RCC_APB2PeriphClockCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
 Enables or disables the High Speed APB (APB2) peripheral clock. More...
 
void RCC_APB1PeriphClockCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
 Enables or disables the Low Speed APB (APB1) peripheral clock. More...
 
void RCC_AHBPeriphResetCmd (uint32_t RCC_AHBPeriph, FunctionalState NewState)
 Forces or releases AHB peripheral reset. More...
 
void RCC_APB2PeriphResetCmd (uint32_t RCC_APB2Periph, FunctionalState NewState)
 Forces or releases High Speed APB (APB2) peripheral reset. More...
 
void RCC_APB1PeriphResetCmd (uint32_t RCC_APB1Periph, FunctionalState NewState)
 Forces or releases Low Speed APB (APB1) peripheral reset. More...
 
void RCC_ITConfig (uint8_t RCC_IT, FunctionalState NewState)
 Enables or disables the specified RCC interrupts. More...
 
FlagStatus RCC_GetFlagStatus (uint8_t RCC_FLAG)
 Checks whether the specified RCC flag is set or not. More...
 
void RCC_ClearFlag (void)
 Clears the RCC reset flags. The reset flags are: RCC_FLAG_OBLRST, RCC_FLAG_PINRST, RCC_FLAG_V18PWRRSTF, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST. More...
 
ITStatus RCC_GetITStatus (uint8_t RCC_IT)
 Checks whether the specified RCC interrupt has occurred or not. More...
 
void RCC_ClearITPendingBit (uint8_t RCC_IT)
 Clears the RCC's interrupt pending bits. More...
 

Detailed Description

RCC driver modules.

Function Documentation

void RCC_ADCCLKConfig ( uint32_t  RCC_ADCCLK)

Configures the ADC clock (ADCCLK).

Parameters
RCC_ADCCLK,:defines the ADC clock source. This clock is derived from the HSI14 or APB clock (PCLK). This parameter can be one of the following values:
  • RCC_ADCCLK_HSI14: ADC clock = HSI14 (14MHz)
  • RCC_ADCCLK_PCLK_Div2: ADC clock = PCLK/2
  • RCC_ADCCLK_PCLK_Div4: ADC clock = PCLK/4
Return values
None
void RCC_AdjustHSI14CalibrationValue ( uint8_t  HSI14CalibrationValue)

Adjusts the Internal High Speed oscillator for ADC (HSI14) calibration value.

Note
The calibration is used to compensate for the variations in voltage and temperature that influence the frequency of the internal HSI RC. Refer to the Application Note AN4067 for more details on how to calibrate the HSI14.
Parameters
HSI14CalibrationValue,:specifies the HSI14 calibration trimming value. This parameter must be a number between 0 and 0x1F.
Return values
None
void RCC_AdjustHSICalibrationValue ( uint8_t  HSICalibrationValue)

Adjusts the Internal High Speed oscillator (HSI) calibration value.

Note
The calibration is used to compensate for the variations in voltage and temperature that influence the frequency of the internal HSI RC. Refer to the Application Note AN4067 for more details on how to calibrate the HSI.
Parameters
HSICalibrationValue,:specifies the HSI calibration trimming value. This parameter must be a number between 0 and 0x1F.
Return values
None
void RCC_AHBPeriphClockCmd ( uint32_t  RCC_AHBPeriph,
FunctionalState  NewState 
)

Enables or disables the AHB peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Parameters
RCC_AHBPeriph,:specifies the AHB peripheral to gates its clock. This parameter can be any combination of the following values:
  • RCC_AHBPeriph_GPIOA: GPIOA clock
  • RCC_AHBPeriph_GPIOB: GPIOB clock
  • RCC_AHBPeriph_GPIOC: GPIOC clock
  • RCC_AHBPeriph_GPIOD: GPIOD clock
  • RCC_AHBPeriph_GPIOF: GPIOF clock
  • RCC_AHBPeriph_TS: TS clock
  • RCC_AHBPeriph_CRC: CRC clock
  • RCC_AHBPeriph_FLITF: (has effect only when the Flash memory is in power down mode)
  • RCC_AHBPeriph_SRAM: SRAM clock
  • RCC_AHBPeriph_DMA1: DMA1 clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_AHBPeriphResetCmd ( uint32_t  RCC_AHBPeriph,
FunctionalState  NewState 
)

Forces or releases AHB peripheral reset.

Parameters
RCC_AHBPeriph,:specifies the AHB peripheral to reset. This parameter can be any combination of the following values:
  • RCC_AHBPeriph_GPIOA: GPIOA clock
  • RCC_AHBPeriph_GPIOB: GPIOB clock
  • RCC_AHBPeriph_GPIOC: GPIOC clock
  • RCC_AHBPeriph_GPIOD: GPIOD clock
  • RCC_AHBPeriph_GPIOF: GPIOF clock
  • RCC_AHBPeriph_TS: TS clock
NewState,:new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB1PeriphClockCmd ( uint32_t  RCC_APB1Periph,
FunctionalState  NewState 
)

Enables or disables the Low Speed APB (APB1) peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Parameters
RCC_APB1Periph,:specifies the APB1 peripheral to gates its clock. This parameter can be any combination of the following values:
  • RCC_APB1Periph_TIM2: TIM2 clock
  • RCC_APB1Periph_TIM3: TIM3 clock
  • RCC_APB1Periph_TIM6: TIM6 clock
  • RCC_APB1Periph_TIM14: TIM14 clock
  • RCC_APB1Periph_WWDG: WWDG clock
  • RCC_APB1Periph_SPI2: SPI2 clock
  • RCC_APB1Periph_USART2: USART2 clock
  • RCC_APB1Periph_I2C1: I2C1 clock
  • RCC_APB1Periph_I2C2: I2C2 clock
  • RCC_APB1Periph_PWR: PWR clock
  • RCC_APB1Periph_DAC: DAC clock
  • RCC_APB1Periph_CEC: CEC clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB1PeriphResetCmd ( uint32_t  RCC_APB1Periph,
FunctionalState  NewState 
)

Forces or releases Low Speed APB (APB1) peripheral reset.

Parameters
RCC_APB1Periph,:specifies the APB1 peripheral to reset. This parameter can be any combination of the following values:
  • RCC_APB1Periph_TIM2: TIM2 clock
  • RCC_APB1Periph_TIM3: TIM3 clock
  • RCC_APB1Periph_TIM6: TIM6 clock
  • RCC_APB1Periph_TIM14: TIM14 clock
  • RCC_APB1Periph_WWDG: WWDG clock
  • RCC_APB1Periph_SPI2: SPI2 clock
  • RCC_APB1Periph_USART2: USART2 clock
  • RCC_APB1Periph_I2C1: I2C1 clock
  • RCC_APB1Periph_I2C2: I2C2 clock
  • RCC_APB1Periph_PWR: PWR clock
  • RCC_APB1Periph_DAC: DAC clock
  • RCC_APB1Periph_CEC: CEC clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB2PeriphClockCmd ( uint32_t  RCC_APB2Periph,
FunctionalState  NewState 
)

Enables or disables the High Speed APB (APB2) peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Parameters
RCC_APB2Periph,:specifies the APB2 peripheral to gates its clock. This parameter can be any combination of the following values:
  • RCC_APB2Periph_SYSCFG: SYSCFG clock
  • RCC_APB2Periph_ADC1: ADC1 clock
  • RCC_APB2Periph_TIM1: TIM1 clock
  • RCC_APB2Periph_SPI1: SPI1 clock
  • RCC_APB2Periph_USART1: USART1 clock
  • RCC_APB2Periph_TIM15: TIM15 clock
  • RCC_APB2Periph_TIM16: TIM16 clock
  • RCC_APB2Periph_TIM17: TIM17 clock
  • RCC_APB2Periph_DBGMCU: DBGMCU clock
NewState,:new state of the specified peripheral clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_APB2PeriphResetCmd ( uint32_t  RCC_APB2Periph,
FunctionalState  NewState 
)

Forces or releases High Speed APB (APB2) peripheral reset.

Parameters
RCC_APB2Periph,:specifies the APB2 peripheral to reset. This parameter can be any combination of the following values:
  • RCC_APB2Periph_SYSCFG: SYSCFG clock
  • RCC_APB2Periph_ADC1: ADC1 clock
  • RCC_APB2Periph_TIM1: TIM1 clock
  • RCC_APB2Periph_SPI1: SPI1 clock
  • RCC_APB2Periph_USART1: USART1 clock
  • RCC_APB2Periph_TIM15: TIM15 clock
  • RCC_APB2Periph_TIM16: TIM16 clock
  • RCC_APB2Periph_TIM17: TIM17 clock
  • RCC_APB2Periph_DBGMCU: DBGMCU clock
NewState,:new state of the specified peripheral reset. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_BackupResetCmd ( FunctionalState  NewState)

Forces or releases the Backup domain reset.

Note
This function resets the RTC peripheral (including the backup registers) and the RTC clock source selection in RCC_BDCR register.
Parameters
NewState,:new state of the Backup domain reset. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_CECCLKConfig ( uint32_t  RCC_CECCLK)

Configures the CEC clock (CECCLK).

Parameters
RCC_CECCLK,:defines the CEC clock source. This clock is derived from the HSI or LSE clock. This parameter can be one of the following values:
  • RCC_CECCLK_HSI_Div244: CEC clock = HSI/244 (32768Hz)
  • RCC_CECCLK_LSE: CEC clock = LSE
Return values
None
void RCC_ClearFlag ( void  )

Clears the RCC reset flags. The reset flags are: RCC_FLAG_OBLRST, RCC_FLAG_PINRST, RCC_FLAG_V18PWRRSTF, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST.

Parameters
None
Return values
None
void RCC_ClearITPendingBit ( uint8_t  RCC_IT)

Clears the RCC's interrupt pending bits.

Parameters
RCC_IT,:specifies the interrupt pending bit to clear. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: PLL ready interrupt
  • RCC_IT_HSI14RDY: HSI14 ready interrupt
  • RCC_IT_CSS: Clock Security System interrupt
Return values
None
void RCC_ClockSecuritySystemCmd ( FunctionalState  NewState)

Enables or disables the Clock Security System.

Note
If a failure is detected on the HSE oscillator clock, this oscillator is automatically disabled and an interrupt is generated to inform the software about the failure (Clock Security System Interrupt, CSSI), allowing the MCU to perform rescue operations. The CSSI is linked to the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector.
Parameters
NewState,:new state of the Clock Security System. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_DeInit ( void  )

Resets the RCC clock configuration to the default reset state.

Note
The default reset state of the clock configuration is given below:
HSI ON and used as system clock source
HSI14, HSE and PLL OFF
AHB, APB prescaler set to 1.
CSS and MCO OFF
All interrupts disabled
However, this function doesn't modify the configuration of the
Peripheral clocks
LSI, LSE and RTC clocks
Parameters
None
Return values
None
void RCC_GetClocksFreq ( RCC_ClocksTypeDef RCC_Clocks)

Returns the frequencies of the System, AHB and APB busses clocks.

Note
The frequency returned by this function is not the real frequency in the chip. It is calculated based on the predefined constant and the source selected by RCC_SYSCLKConfig():
If SYSCLK source is HSI, function returns constant HSI_VALUE(*)
If SYSCLK source is HSE, function returns constant HSE_VALUE(**)
If SYSCLK source is PLL, function returns constant HSE_VALUE(**) or HSI_VALUE(*) multiplied by the PLL factors.
(*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value 8 MHz) but the real value may vary depending on the variations in voltage and temperature, refer to RCC_AdjustHSICalibrationValue().
(**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value 8 MHz), user has to ensure that HSE_VALUE is same as the real frequency of the crystal used. Otherwise, this function may return wrong result.
The result of this function could be not correct when using fractional value for HSE crystal.
Parameters
RCC_Clocks,:pointer to a RCC_ClocksTypeDef structure which will hold the clocks frequencies.
Note
This function can be used by the user application to compute the baudrate for the communication peripherals or configure other parameters.
Each time SYSCLK, HCLK and/or PCLK clock changes, this function must be called to update the structure's field. Otherwise, any configuration based on this function will be incorrect.
Return values
None
FlagStatus RCC_GetFlagStatus ( uint8_t  RCC_FLAG)

Checks whether the specified RCC flag is set or not.

Parameters
RCC_FLAG,:specifies the flag to check. This parameter can be one of the following values:
  • RCC_FLAG_HSIRDY: HSI oscillator clock ready
  • RCC_FLAG_HSERDY: HSE oscillator clock ready
  • RCC_FLAG_PLLRDY: PLL clock ready
  • RCC_FLAG_LSERDY: LSE oscillator clock ready
  • RCC_FLAG_LSIRDY: LSI oscillator clock ready
  • RCC_FLAG_OBLRST: Option Byte Loader (OBL) reset
  • RCC_FLAG_PINRST: Pin reset
  • RCC_FLAG_V18PWRRSTF: V1.8 power domain reset
  • RCC_FLAG_PORRST: POR/PDR reset
  • RCC_FLAG_SFTRST: Software reset
  • RCC_FLAG_IWDGRST: Independent Watchdog reset
  • RCC_FLAG_WWDGRST: Window Watchdog reset
  • RCC_FLAG_LPWRRST: Low Power reset
  • RCC_FLAG_HSI14RDY: HSI14 oscillator clock ready
Return values
Thenew state of RCC_FLAG (SET or RESET).
ITStatus RCC_GetITStatus ( uint8_t  RCC_IT)

Checks whether the specified RCC interrupt has occurred or not.

Parameters
RCC_IT,:specifies the RCC interrupt source to check. This parameter can be one of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: PLL ready interrupt
  • RCC_IT_HSI14RDY: HSI14 ready interrupt
  • RCC_IT_CSS: Clock Security System interrupt
Return values
Thenew state of RCC_IT (SET or RESET).
uint8_t RCC_GetSYSCLKSource ( void  )

Returns the clock source used as system clock.

Parameters
None
Return values
Theclock source used as system clock. The returned value can be one of the following values:
  • 0x00: HSI used as system clock
  • 0x04: HSE used as system clock
  • 0x08: PLL used as system clock
void RCC_HCLKConfig ( uint32_t  RCC_SYSCLK)

Configures the AHB clock (HCLK).

Parameters
RCC_SYSCLK,:defines the AHB clock divider. This clock is derived from the system clock (SYSCLK). This parameter can be one of the following values:
  • RCC_SYSCLK_Div1: AHB clock = SYSCLK
  • RCC_SYSCLK_Div2: AHB clock = SYSCLK/2
  • RCC_SYSCLK_Div4: AHB clock = SYSCLK/4
  • RCC_SYSCLK_Div8: AHB clock = SYSCLK/8
  • RCC_SYSCLK_Div16: AHB clock = SYSCLK/16
  • RCC_SYSCLK_Div64: AHB clock = SYSCLK/64
  • RCC_SYSCLK_Div128: AHB clock = SYSCLK/128
  • RCC_SYSCLK_Div256: AHB clock = SYSCLK/256
  • RCC_SYSCLK_Div512: AHB clock = SYSCLK/512
Return values
None
void RCC_HSEConfig ( uint8_t  RCC_HSE)

Configures the External High Speed oscillator (HSE).

Note
After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application software should wait on HSERDY flag to be set indicating that HSE clock is stable and can be used to clock the PLL and/or system clock.
HSE state can not be changed if it is used directly or through the PLL as system clock. In this case, you have to select another source of the system clock then change the HSE state (ex. disable it).
The HSE is stopped by hardware when entering STOP and STANDBY modes.
This function resets the CSSON bit, so if the Clock security system(CSS) was previously enabled you have to enable it again after calling this function.
Parameters
RCC_HSE,:specifies the new state of the HSE. This parameter can be one of the following values:
  • RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after 6 HSE oscillator clock cycles.
  • RCC_HSE_ON: turn ON the HSE oscillator
  • RCC_HSE_Bypass: HSE oscillator bypassed with external clock
Return values
None
void RCC_HSI14ADCRequestCmd ( FunctionalState  NewState)

Enables or disables the Internal High Speed oscillator request from ADC.

Parameters
NewState,:new state of the HSI14 ADC request. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_HSI14Cmd ( FunctionalState  NewState)

Enables or disables the Internal High Speed oscillator for ADC (HSI14).

Note
After enabling the HSI14, the application software should wait on HSIRDY flag to be set indicating that HSI clock is stable and can be used to clock the ADC.
The HSI14 is stopped by hardware when entering STOP and STANDBY modes.
Parameters
NewState,:new state of the HSI14. This parameter can be: ENABLE or DISABLE.
Note
When the HSI14 is stopped, HSI14RDY flag goes low after 6 HSI14 oscillator clock cycles.
Return values
None
void RCC_HSICmd ( FunctionalState  NewState)

Enables or disables the Internal High Speed oscillator (HSI).

Note
After enabling the HSI, the application software should wait on HSIRDY flag to be set indicating that HSI clock is stable and can be used to clock the PLL and/or system clock.
HSI can not be stopped if it is used directly or through the PLL as system clock. In this case, you have to select another source of the system clock then stop the HSI.
The HSI is stopped by hardware when entering STOP and STANDBY modes.
Parameters
NewState,:new state of the HSI. This parameter can be: ENABLE or DISABLE.
Note
When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator clock cycles.
Return values
None
void RCC_I2CCLKConfig ( uint32_t  RCC_I2CCLK)

Configures the I2C1 clock (I2C1CLK).

Parameters
RCC_I2CCLK,:defines the I2C1 clock source. This clock is derived from the HSI or System clock. This parameter can be one of the following values:
  • RCC_I2C1CLK_HSI: I2C1 clock = HSI
  • RCC_I2C1CLK_SYSCLK: I2C1 clock = System Clock
Return values
None
void RCC_ITConfig ( uint8_t  RCC_IT,
FunctionalState  NewState 
)

Enables or disables the specified RCC interrupts.

Note
The CSS interrupt doesn't have an enable bit; once the CSS is enabled and if the HSE clock fails, the CSS interrupt occurs and an NMI is automatically generated. The NMI will be executed indefinitely, and since NMI has higher priority than any other IRQ (and main program) the application will be stacked in the NMI ISR unless the CSS interrupt pending bit is cleared.
Parameters
RCC_IT,:specifies the RCC interrupt sources to be enabled or disabled. This parameter can be any combination of the following values:
  • RCC_IT_LSIRDY: LSI ready interrupt
  • RCC_IT_LSERDY: LSE ready interrupt
  • RCC_IT_HSIRDY: HSI ready interrupt
  • RCC_IT_HSERDY: HSE ready interrupt
  • RCC_IT_PLLRDY: PLL ready interrupt
  • RCC_IT_HSI14RDY: HSI14 ready interrupt
NewState,:new state of the specified RCC interrupts. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_LSEConfig ( uint32_t  RCC_LSE)

Configures the External Low Speed oscillator (LSE).

Note
As the LSE is in the Backup domain and write access is denied to this domain after reset, you have to enable write access using PWR_BackupAccessCmd(ENABLE) function before to configure the LSE (to be done once after reset).
After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application software should wait on LSERDY flag to be set indicating that LSE clock is stable and can be used to clock the RTC.
Parameters
RCC_LSE,:specifies the new state of the LSE. This parameter can be one of the following values:
  • RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after 6 LSE oscillator clock cycles.
  • RCC_LSE_ON: turn ON the LSE oscillator
  • RCC_LSE_Bypass: LSE oscillator bypassed with external clock
Return values
None
void RCC_LSEDriveConfig ( uint32_t  RCC_LSEDrive)

Configures the External Low Speed oscillator (LSE) drive capability.

Parameters
RCC_LSEDrive,:specifies the new state of the LSE drive capability. This parameter can be one of the following values:
  • RCC_LSEDrive_Low: LSE oscillator low drive capability.
  • RCC_LSEDrive_MediumLow: LSE oscillator medium low drive capability.
  • RCC_LSEDrive_MediumHigh: LSE oscillator medium high drive capability.
  • RCC_LSEDrive_High: LSE oscillator high drive capability.
Return values
None
void RCC_LSICmd ( FunctionalState  NewState)

Enables or disables the Internal Low Speed oscillator (LSI).

Note
After enabling the LSI, the application software should wait on LSIRDY flag to be set indicating that LSI clock is stable and can be used to clock the IWDG and/or the RTC.
LSI can not be disabled if the IWDG is running.
Parameters
NewState,:new state of the LSI. This parameter can be: ENABLE or DISABLE.
Note
When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator clock cycles.
Return values
None
void RCC_MCOConfig ( uint8_t  RCC_MCOSource)

Selects the clock source to output on MCO pin (PA8).

Note
PA8 should be configured in alternate function mode.
Parameters
RCC_MCOSource,:specifies the clock source to output. This parameter can be one of the following values:
  • RCC_MCOSource_NoClock: No clock selected.
  • RCC_MCOSource_HSI14: HSI14 oscillator clock selected.
  • RCC_MCOSource_LSI: LSI oscillator clock selected.
  • RCC_MCOSource_LSE: LSE oscillator clock selected.
  • RCC_MCOSource_SYSCLK: System clock selected.
  • RCC_MCOSource_HSI: HSI oscillator clock selected.
  • RCC_MCOSource_HSE: HSE oscillator clock selected.
  • RCC_MCOSource_PLLCLK_Div2: PLL clock divided by 2 selected.
Return values
None
void RCC_PCLKConfig ( uint32_t  RCC_HCLK)

Configures the APB clock (PCLK).

Parameters
RCC_HCLK,:defines the APB clock divider. This clock is derived from the AHB clock (HCLK). This parameter can be one of the following values:
  • RCC_HCLK_Div1: APB clock = HCLK
  • RCC_HCLK_Div2: APB clock = HCLK/2
  • RCC_HCLK_Div4: APB clock = HCLK/4
  • RCC_HCLK_Div8: APB clock = HCLK/8
  • RCC_HCLK_Div16: APB clock = HCLK/16
Return values
None
void RCC_PLLCmd ( FunctionalState  NewState)

Enables or disables the PLL.

Note
After enabling the PLL, the application software should wait on PLLRDY flag to be set indicating that PLL clock is stable and can be used as system clock source.
The PLL can not be disabled if it is used as system clock source
The PLL is disabled by hardware when entering STOP and STANDBY modes.
Parameters
NewState,:new state of the PLL. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_PLLConfig ( uint32_t  RCC_PLLSource,
uint32_t  RCC_PLLMul 
)

Configures the PLL clock source and multiplication factor.

Note
This function must be used only when the PLL is disabled.
Parameters
RCC_PLLSource,:specifies the PLL entry clock source. This parameter can be one of the following values:
  • RCC_PLLSource_HSI_Div2: HSI oscillator clock selected as PLL clock source
  • RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry
Note
The minimum input clock frequency for PLL is 2 MHz (when using HSE as PLL source).
Parameters
RCC_PLLMul,:specifies the PLL multiplication factor, which drive the PLLVCO clock This parameter can be RCC_PLLMul_x where x:[2,16]
Return values
None
void RCC_PREDIV1Config ( uint32_t  RCC_PREDIV1_Div)

Configures the PREDIV1 division factor.

Note
This function must be used only when the PLL is disabled.
Parameters
RCC_PREDIV1_Div,:specifies the PREDIV1 clock division factor. This parameter can be RCC_PREDIV1_Divx where x:[1,16]
Return values
None
void RCC_RTCCLKCmd ( FunctionalState  NewState)

Enables or disables the RTC clock.

Note
This function must be used only after the RTC clock source was selected using the RCC_RTCCLKConfig function.
Parameters
NewState,:new state of the RTC clock. This parameter can be: ENABLE or DISABLE.
Return values
None
void RCC_RTCCLKConfig ( uint32_t  RCC_RTCCLKSource)

Configures the RTC clock (RTCCLK).

Note
As the RTC clock configuration bits are in the Backup domain and write access is denied to this domain after reset, you have to enable write access using PWR_BackupAccessCmd(ENABLE) function before to configure the RTC clock source (to be done once after reset).
Once the RTC clock is configured it can't be changed unless the RTC is reset using RCC_BackupResetCmd function, or by a Power On Reset (POR)
Parameters
RCC_RTCCLKSource,:specifies the RTC clock source. This parameter can be one of the following values:
  • RCC_RTCCLKSource_LSE: LSE selected as RTC clock
  • RCC_RTCCLKSource_LSI: LSI selected as RTC clock
  • RCC_RTCCLKSource_HSE_Div32: HSE divided by 32 selected as RTC clock
Note
If the LSE or LSI is used as RTC clock source, the RTC continues to work in STOP and STANDBY modes, and can be used as wakeup source. However, when the HSE clock is used as RTC clock source, the RTC cannot be used in STOP and STANDBY modes.
The maximum input clock frequency for RTC is 2MHz (when using HSE as RTC clock source).
Return values
None
void RCC_SYSCLKConfig ( uint32_t  RCC_SYSCLKSource)

Configures the system clock (SYSCLK).

Note
The HSI is used (enabled by hardware) as system clock source after startup from Reset, wake-up from STOP and STANDBY mode, or in case of failure of the HSE used directly or indirectly as system clock (if the Clock Security System CSS is enabled).
A switch from one clock source to another occurs only if the target clock source is ready (clock stable after startup delay or PLL locked). If a clock source which is not yet ready is selected, the switch will occur when the clock source will be ready. You can use RCC_GetSYSCLKSource() function to know which clock is currently used as system clock source.
Parameters
RCC_SYSCLKSource,:specifies the clock source used as system clock source This parameter can be one of the following values:
  • RCC_SYSCLKSource_HSI: HSI selected as system clock source
  • RCC_SYSCLKSource_HSE: HSE selected as system clock source
  • RCC_SYSCLKSource_PLLCLK: PLL selected as system clock source
Return values
None
void RCC_USARTCLKConfig ( uint32_t  RCC_USARTCLK)

Configures the USART1 clock (USART1CLK).

Parameters
RCC_USARTCLK,:defines the USART1 clock source. This clock is derived from the HSI or System clock. This parameter can be one of the following values:
  • RCC_USART1CLK_PCLK: USART1 clock = APB Clock (PCLK)
  • RCC_USART1CLK_SYSCLK: USART1 clock = System Clock
  • RCC_USART1CLK_LSE: USART1 clock = LSE Clock
  • RCC_USART1CLK_HSI: USART1 clock = HSI Clock
Return values
None
ErrorStatus RCC_WaitForHSEStartUp ( void  )

Waits for HSE start-up.

Note
This function waits on HSERDY flag to be set and return SUCCESS if this flag is set, otherwise returns ERROR if the timeout is reached and this flag is not set. The timeout value is defined by the constant HSE_STARTUP_TIMEOUT in stm32f0xx.h file. You can tailor it depending on the HSE crystal used in your application.
The HSE is stopped by hardware when entering STOP and STANDBY modes.
Parameters
None
Return values
AnErrorStatus enumeration value:
  • SUCCESS: HSE oscillator is stable and ready to use
  • ERROR: HSE oscillator not yet ready