Main and Backup Regulators configuration functions.
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Main and Backup Regulators configuration functions.
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Main and Backup Regulators configuration functions
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- The backup domain includes 4 Kbytes of backup SRAM accessible only from the
CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is retained
even in Standby or VBAT mode when the low power backup regulator is enabled.
It can be considered as an internal EEPROM when VBAT is always present.
You can use the PWR_BackupRegulatorCmd() function to enable the low power
backup regulator and use the PWR_GetFlagStatus(PWR_FLAG_BRR) to check if it is
ready or not.
- When the backup domain is supplied by VDD (analog switch connected to VDD)
the backup SRAM is powered from VDD which replaces the VBAT power supply to
save battery life.
- The backup SRAM is not mass erased by an tamper event. It is read protected
to prevent confidential data, such as cryptographic private key, from being
accessed. The backup SRAM can be erased only through the Flash interface when
a protection level change from level 1 to level 0 is requested.
Refer to the description of Read protection (RDP) in the Flash programming manual.
- The main internal regulator can be configured to have a tradeoff between performance
and power consumption when the device does not operate at the maximum frequency.
This is done through PWR_MainRegulatorModeConfig() function which configure VOS bit
in PWR_CR register:
- When this bit is set (Regulator voltage output Scale 1 mode selected) the System
frequency can go up to 168 MHz.
- When this bit is reset (Regulator voltage output Scale 2 mode selected) the System
frequency can go up to 144 MHz.
Refer to the datasheets for more details.
| void PWR_BackupRegulatorCmd |
( |
FunctionalState |
NewState | ) |
|
Enables or disables the Backup Regulator.
- Parameters
-
| NewState,: | new state of the Backup Regulator. This parameter can be: ENABLE or DISABLE. |
- Return values
-
| void PWR_MainRegulatorModeConfig |
( |
uint32_t |
PWR_Regulator_Voltage | ) |
|
Configures the main internal regulator output voltage.
- Parameters
-
| PWR_Regulator_Voltage,: | specifies the regulator output voltage to achieve a tradeoff between performance and power consumption when the device does not operate at the maximum frequency (refer to the datasheets for more details). This parameter can be one of the following values:
- PWR_Regulator_Voltage_Scale1: Regulator voltage output Scale 1 mode, System frequency up to 168 MHz.
- PWR_Regulator_Voltage_Scale2: Regulator voltage output Scale 2 mode, System frequency up to 144 MHz.
|
- Return values
-
1.8.3.1