STM32F37 Standard Peripheral bibliotheek  1.0
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stm32f37x_sdadc.h
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1 
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F37X_SDADC_H
31 #define __STM32F37X_SDADC_H
32 
33 #ifdef __cplusplus
34  extern "C" {
35 #endif
36 
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f37x.h"
39 
48 /* Exported types ------------------------------------------------------------*/
49 
54 typedef struct
55 {
56  uint32_t SDADC_Channel;
59  FunctionalState SDADC_ContinuousConvMode;
63  FunctionalState SDADC_FastConversionMode;
67 }SDADC_InitTypeDef;
68 
73 typedef struct
74 {
75  uint32_t SDADC_InputMode;
78  uint32_t SDADC_Gain;
81  uint32_t SDADC_CommonMode;
84  uint32_t SDADC_Offset;
86 }SDADC_AINStructTypeDef;
87 
88 /* Exported constants --------------------------------------------------------*/
89 
94 #define IS_SDADC_ALL_PERIPH(PERIPH) (((PERIPH) == SDADC1) || \
95  ((PERIPH) == SDADC2) || \
96  ((PERIPH) == SDADC3))
97 
98 #define IS_SDADC_SLAVE_PERIPH(PERIPH) (((PERIPH) == SDADC2) || \
99  ((PERIPH) == SDADC3))
100 
105 /* SDADC Channels ------------------------------------------------------------*/
106 /* The SDADC channels are defined as follow:
107  - in 16-bit LSB the channel mask is set
108  - in 16-bit MSB the channel number is set
109  e.g. for channel 5 definition:
110  - the channel mask is 0x00000020 (bit 5 is set)
111  - the channel number 5 is 0x00050000
112  --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */
113 #define SDADC_Channel_0 ((uint32_t)0x00000001)
114 #define SDADC_Channel_1 ((uint32_t)0x00010002)
115 #define SDADC_Channel_2 ((uint32_t)0x00020004)
116 #define SDADC_Channel_3 ((uint32_t)0x00030008)
117 #define SDADC_Channel_4 ((uint32_t)0x00040010)
118 #define SDADC_Channel_5 ((uint32_t)0x00050020)
119 #define SDADC_Channel_6 ((uint32_t)0x00060040)
120 #define SDADC_Channel_7 ((uint32_t)0x00070080)
121 #define SDADC_Channel_8 ((uint32_t)0x00080100)
122 
123 /* Just one channel of the 9 channels can be selected for regular conversion */
124 #define IS_SDADC_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == SDADC_Channel_0) || \
125  ((CHANNEL) == SDADC_Channel_1) || \
126  ((CHANNEL) == SDADC_Channel_2) || \
127  ((CHANNEL) == SDADC_Channel_3) || \
128  ((CHANNEL) == SDADC_Channel_4) || \
129  ((CHANNEL) == SDADC_Channel_5) || \
130  ((CHANNEL) == SDADC_Channel_6) || \
131  ((CHANNEL) == SDADC_Channel_7) || \
132  ((CHANNEL) == SDADC_Channel_8))
133 
134 /* Any or all of the 9 channels can be selected for injected conversion */
135 #define IS_SDADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F01FF))
136 
145 #define SDADC_Conf_0 ((uint32_t)0x00000000)
146 #define SDADC_Conf_1 ((uint32_t)0x00000001)
147 #define SDADC_Conf_2 ((uint32_t)0x00000002)
149 #define IS_SDADC_CONF(CONF) (((CONF) == SDADC_Conf_0) || \
150  ((CONF) == SDADC_Conf_1) || \
151  ((CONF) == SDADC_Conf_2))
152 
161 #define SDADC_InputMode_Diff ((uint32_t)0x00000000)
162 #define SDADC_InputMode_SEOffset SDADC_CONF0R_SE0_0
163 #define SDADC_InputMode_SEZeroReference SDADC_CONF0R_SE0
165 #define IS_SDADC_INPUT_MODE(MODE) (((MODE) == SDADC_InputMode_Diff) || \
166  ((MODE) == SDADC_InputMode_SEOffset) || \
167  ((MODE) == SDADC_InputMode_SEZeroReference))
168 
176 #define SDADC_Gain_1 ((uint32_t)0x00000000)
177 #define SDADC_Gain_2 SDADC_CONF0R_GAIN0_0
178 #define SDADC_Gain_4 SDADC_CONF0R_GAIN0_1
179 #define SDADC_Gain_8 ((uint32_t)0x00300000)
180 #define SDADC_Gain_16 SDADC_CONF0R_GAIN0_2
181 #define SDADC_Gain_32 ((uint32_t)0x00500000)
182 #define SDADC_Gain_1_2 SDADC_CONF0R_GAIN0
184 #define IS_SDADC_GAIN(GAIN) (((GAIN) == SDADC_Gain_1) || \
185  ((GAIN) == SDADC_Gain_2) || \
186  ((GAIN) == SDADC_Gain_4) || \
187  ((GAIN) == SDADC_Gain_8) || \
188  ((GAIN) == SDADC_Gain_16) || \
189  ((GAIN) == SDADC_Gain_32) || \
190  ((GAIN) == SDADC_Gain_1_2))
191 
200 #define SDADC_CommonMode_VSSA ((uint32_t)0x00000000)
201 #define SDADC_CommonMode_VDDA_2 SDADC_CONF0R_COMMON0_0
202 #define SDADC_CommonMode_VDDA SDADC_CONF0R_COMMON0_1
204 #define IS_SDADC_COMMON_MODE(MODE) (((MODE) == SDADC_CommonMode_VSSA) || \
205  ((MODE) == SDADC_CommonMode_VDDA_2) || \
206  ((MODE) == SDADC_CommonMode_VDDA))
207 
216 #define IS_SDADC_OFFSET_VALUE(VALUE) ((VALUE) <= 0x00000FFF)
217 
225 #define SDADC_ExternalTrigInjecConv_T13_CC1 ((uint32_t)0x00000000)
226 #define SDADC_ExternalTrigInjecConv_T14_CC1 ((uint32_t)0x00000100)
227 #define SDADC_ExternalTrigInjecConv_T16_CC1 ((uint32_t)0x00000000)
228 #define SDADC_ExternalTrigInjecConv_T17_CC1 ((uint32_t)0x00000000)
229 #define SDADC_ExternalTrigInjecConv_T12_CC1 ((uint32_t)0x00000100)
230 #define SDADC_ExternalTrigInjecConv_T12_CC2 ((uint32_t)0x00000100)
231 #define SDADC_ExternalTrigInjecConv_T15_CC2 ((uint32_t)0x00000200)
232 #define SDADC_ExternalTrigInjecConv_T2_CC3 ((uint32_t)0x00000200)
233 #define SDADC_ExternalTrigInjecConv_T2_CC4 ((uint32_t)0x00000200)
234 #define SDADC_ExternalTrigInjecConv_T3_CC1 ((uint32_t)0x00000300)
235 #define SDADC_ExternalTrigInjecConv_T3_CC2 ((uint32_t)0x00000300)
236 #define SDADC_ExternalTrigInjecConv_T3_CC3 ((uint32_t)0x00000300)
237 #define SDADC_ExternalTrigInjecConv_T4_CC1 ((uint32_t)0x00000400)
238 #define SDADC_ExternalTrigInjecConv_T4_CC2 ((uint32_t)0x00000400)
239 #define SDADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00000400)
240 #define SDADC_ExternalTrigInjecConv_T19_CC2 ((uint32_t)0x00000500)
241 #define SDADC_ExternalTrigInjecConv_T19_CC3 ((uint32_t)0x00000500)
242 #define SDADC_ExternalTrigInjecConv_T19_CC4 ((uint32_t)0x00000500)
243 #define SDADC_ExternalTrigInjecConv_Ext_IT11 ((uint32_t)0x00000700)
244 #define SDADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x00000600)
246 #define IS_SDADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == SDADC_ExternalTrigInjecConv_T13_CC1) || \
247  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T14_CC1) || \
248  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T16_CC1) || \
249  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T17_CC1) || \
250  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T12_CC1) || \
251  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T12_CC2) || \
252  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T15_CC2) || \
253  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T2_CC3) || \
254  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T2_CC4) || \
255  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T3_CC1) || \
256  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T3_CC2) || \
257  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T3_CC3) || \
258  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T4_CC1) || \
259  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T4_CC2) || \
260  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T4_CC3) || \
261  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T19_CC2) || \
262  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T19_CC3) || \
263  ((INJTRIG) == SDADC_ExternalTrigInjecConv_T19_CC4) || \
264  ((INJTRIG) == SDADC_ExternalTrigInjecConv_Ext_IT11) || \
265  ((INJTRIG) == SDADC_ExternalTrigInjecConv_Ext_IT15))
266 
273 #define SDADC_ExternalTrigInjecConvEdge_None ((uint32_t) 0x00000000)
274 #define SDADC_ExternalTrigInjecConvEdge_Rising SDADC_CR2_JEXTEN_0
275 #define SDADC_ExternalTrigInjecConvEdge_Falling SDADC_CR2_JEXTEN_1
276 #define SDADC_ExternalTrigInjecConvEdge_RisingFalling SDADC_CR2_JEXTEN
277 
278 #define IS_SDADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == SDADC_ExternalTrigInjecConvEdge_None) || \
279  ((EDGE) == SDADC_ExternalTrigInjecConvEdge_Rising) || \
280  ((EDGE) == SDADC_ExternalTrigInjecConvEdge_Falling) || \
281  ((EDGE) == SDADC_ExternalTrigInjecConvEdge_RisingFalling))
282 
289 #define SDADC_DMATransfer_Regular SDADC_CR1_RDMAEN
290 #define SDADC_DMATransfer_Injected SDADC_CR1_JDMAEN
292 #define IS_SDADC_DMA_TRANSFER(TRANSFER) (((TRANSFER) == SDADC_DMATransfer_Regular) || \
293  ((TRANSFER) == SDADC_DMATransfer_Injected))
294 
301 #define SDADC_CalibrationSequence_1 ((uint32_t)0x00000000)
302 #define SDADC_CalibrationSequence_2 SDADC_CR2_CALIBCNT_0
303 #define SDADC_CalibrationSequence_3 SDADC_CR2_CALIBCNT_1
305 #define IS_SDADC_CALIB_SEQUENCE(SEQUENCE) (((SEQUENCE) == SDADC_CalibrationSequence_1) || \
306  ((SEQUENCE) == SDADC_CalibrationSequence_2) || \
307  ((SEQUENCE) == SDADC_CalibrationSequence_3))
308 
316 #define SDADC_VREF_Ext ((uint32_t)0x00000000)
317 #define SDADC_VREF_VREFINT1 SDADC_CR1_REFV_0
318 #define SDADC_VREF_VREFINT2 SDADC_CR1_REFV_1
319 #define SDADC_VREF_VDDA SDADC_CR1_REFV
321 #define IS_SDADC_VREF(VREF) (((VREF) == SDADC_VREF_Ext) || \
322  ((VREF) == SDADC_VREF_VREFINT1) || \
323  ((VREF) == SDADC_VREF_VREFINT2) || \
324  ((VREF) == SDADC_VREF_VDDA))
325 
334 #define SDADC_IT_EOCAL ((uint32_t)0x00000001)
335 #define SDADC_IT_JEOC ((uint32_t)0x00000002)
336 #define SDADC_IT_JOVR ((uint32_t)0x00000004)
337 #define SDADC_IT_REOC ((uint32_t)0x00000008)
338 #define SDADC_IT_ROVR ((uint32_t)0x00000010)
340 #define IS_SDADC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFE0) == 0x00000000) && ((IT) != 0x00000000))
341 
342 #define IS_SDADC_GET_IT(IT) (((IT) == SDADC_IT_EOCAL) || ((IT) == SDADC_IT_JEOC) || \
343  ((IT) == SDADC_IT_JOVR) || ((IT) == SDADC_IT_REOC) || \
344  ((IT) == SDADC_IT_ROVR))
345 
346 #define IS_SDADC_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFFFEA) == 0x00000000) && ((IT) != 0x00000000))
347 
356 #define SDADC_FLAG_EOCAL ((uint32_t)0x00000001)
357 #define SDADC_FLAG_JEOC ((uint32_t)0x00000002)
358 #define SDADC_FLAG_JOVR ((uint32_t)0x00000004)
359 #define SDADC_FLAG_REOC ((uint32_t)0x00000008)
360 #define SDADC_FLAG_ROVR ((uint32_t)0x00000010)
361 #define SDADC_FLAG_CALIBIP ((uint32_t)0x00001000)
362 #define SDADC_FLAG_JCIP ((uint32_t)0x00002000)
363 #define SDADC_FLAG_RCIP ((uint32_t)0x00004000)
364 #define SDADC_FLAG_STABIP ((uint32_t)0x00008000)
365 #define SDADC_FLAG_INITRDY ((uint32_t)0x80000000)
367 #define IS_SDADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFE0) == 0x00000000) && ((FLAG) != 0x00000000))
368 
369 #define IS_SDADC_GET_FLAG(FLAG) (((FLAG) == SDADC_FLAG_EOCAL) || ((FLAG) == SDADC_FLAG_JEOC) || \
370  ((FLAG) == SDADC_FLAG_JOVR) || ((FLAG)== SDADC_FLAG_REOC) || \
371  ((FLAG) == SDADC_FLAG_ROVR) || ((FLAG)== SDADC_FLAG_CALIBIP) || \
372  ((FLAG) == SDADC_FLAG_JCIP) || ((FLAG)== SDADC_FLAG_RCIP) || \
373  ((FLAG) == SDADC_FLAG_STABIP) || ((FLAG)== SDADC_FLAG_INITRDY))
374 
375 
384 /* Exported macro ------------------------------------------------------------*/
385 /* Exported functions ------------------------------------------------------- */
386 
387 /* Function used to set the SDADC configuration to the default reset state ****/
388 void SDADC_DeInit(SDADC_TypeDef* SDADCx);
389 
390 /* Initialization and Configuration functions *********************************/
391 void SDADC_Init(SDADC_TypeDef* SDADCx, SDADC_InitTypeDef* SDADC_InitStruct);
392 void SDADC_StructInit(SDADC_InitTypeDef* SDADC_InitStruct);
393 void SDADC_AINInit(SDADC_TypeDef* SDADCx, uint32_t SDADC_Conf, SDADC_AINStructTypeDef* SDADC_AINStruct);
394 void SDADC_AINStructInit(SDADC_AINStructTypeDef* SDADC_AINStruct);
395 void SDADC_ChannelConfig(SDADC_TypeDef* SDADCx, uint32_t SDADC_Channel, uint32_t SDADC_Conf);
396 void SDADC_Cmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
397 void SDADC_InitModeCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
398 void SDADC_FastConversionCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
399 void SDADC_VREFSelect(uint32_t SDADC_VREF);
400 void SDADC_CalibrationSequenceConfig(SDADC_TypeDef* SDADCx, uint32_t SDADC_CalibrationSequence);
401 void SDADC_StartCalibration(SDADC_TypeDef* SDADCx);
402 
403 /* Regular Channels Configuration functions ***********************************/
404 void SDADC_ChannelSelect(SDADC_TypeDef* SDADCx, uint32_t SDADC_Channel);
405 void SDADC_ContinuousModeCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
406 void SDADC_SoftwareStartConv(SDADC_TypeDef* SDADCx);
407 int16_t SDADC_GetConversionValue(SDADC_TypeDef* SDADCx);
408 void SDADC_RegularSynchroSDADC1(SDADC_TypeDef* SDADCx, FunctionalState NewState);
409 uint32_t SDADC_GetConversionSDADC12Value(void);
410 uint32_t SDADC_GetConversionSDADC13Value(void);
411 
412 /* Injected channels Configuration functions **********************************/
413 void SDADC_SoftwareStartInjectedConv(SDADC_TypeDef* SDADCx);
414 void SDADC_InjectedChannelSelect(SDADC_TypeDef* SDADCx, uint32_t SDADC_Channel);
415 void SDADC_DelayStartInjectedConvCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
416 void SDADC_InjectedContinuousModeCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
417 void SDADC_ExternalTrigInjectedConvConfig(SDADC_TypeDef* SDADCx, uint32_t SDADC_ExternalTrigInjecConv);
418 void SDADC_ExternalTrigInjectedConvEdgeConfig(SDADC_TypeDef* SDADCx, uint32_t SDADC_ExternalTrigInjecConvEdge);
419 uint32_t SDADC_GetInjectedChannel(SDADC_TypeDef* SDADCx);
420 int16_t SDADC_GetInjectedConversionValue(SDADC_TypeDef* SDADCx, uint32_t* SDADC_Channel);
421 void SDADC_InjectedSynchroSDADC1(SDADC_TypeDef* SDADCx, FunctionalState NewState);
422 uint32_t SDADC_GetInjectedConversionSDADC12Value(void);
423 uint32_t SDADC_GetInjectedConversionSDADC13Value(void);
424 
425 /* Power saving functions *****************************************************/
426 void SDADC_PowerDownCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
427 void SDADC_StandbyCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
428 void SDADC_SlowClockCmd(SDADC_TypeDef* SDADCx, FunctionalState NewState);
429 
430 /* Regular/Injected Channels DMA Configuration functions **********************/
431 void SDADC_DMAConfig(SDADC_TypeDef* SDADCx, uint32_t SDADC_DMATransfer, FunctionalState NewState);
432 
433 /* Interrupts and flags management functions **********************************/
434 void SDADC_ITConfig(SDADC_TypeDef* SDADCx, uint32_t SDADC_IT, FunctionalState NewState);
435 FlagStatus SDADC_GetFlagStatus(SDADC_TypeDef* SDADCx, uint32_t SDADC_FLAG);
436 void SDADC_ClearFlag(SDADC_TypeDef* SDADCx, uint32_t SDADC_FLAG);
437 ITStatus SDADC_GetITStatus(SDADC_TypeDef* SDADCx, uint32_t SDADC_IT);
438 void SDADC_ClearITPendingBit(SDADC_TypeDef* SDADCx, uint32_t SDADC_IT);
439 
440 #ifdef __cplusplus
441 }
442 #endif
443 
444 #endif /*__STM32F37X_SDADC_H */
445 
455 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/