STM32F37 Standard Peripheral bibliotheek  1.0
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stm32f37x_dma.c File Reference

This file provides firmware functions to manage the following functionalities of the Direct Memory Access controller (DMA): More...

#include "stm32f37x_dma.h"

Macros

#define CCR_CLEAR_MASK   ((uint32_t)0xFFFF800F) /* DMA Channel config registers Masks */
 
#define FLAG_Mask   ((uint32_t)0x10000000) /* DMA2 FLAG mask */
 
#define DMA1_CHANNEL1_IT_MASK   ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1))
 
#define DMA1_CHANNEL2_IT_MASK   ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2))
 
#define DMA1_CHANNEL3_IT_MASK   ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3))
 
#define DMA1_CHANNEL4_IT_MASK   ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4))
 
#define DMA1_CHANNEL5_IT_MASK   ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5))
 
#define DMA1_CHANNEL6_IT_MASK   ((uint32_t)(DMA_ISR_GIF6 | DMA_ISR_TCIF6 | DMA_ISR_HTIF6 | DMA_ISR_TEIF6))
 
#define DMA1_CHANNEL7_IT_MASK   ((uint32_t)(DMA_ISR_GIF7 | DMA_ISR_TCIF7 | DMA_ISR_HTIF7 | DMA_ISR_TEIF7))
 
#define DMA2_CHANNEL1_IT_MASK   ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1))
 
#define DMA2_CHANNEL2_IT_MASK   ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2))
 
#define DMA2_CHANNEL3_IT_MASK   ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3))
 
#define DMA2_CHANNEL4_IT_MASK   ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4))
 
#define DMA2_CHANNEL5_IT_MASK   ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5))
 

Functions

void DMA_DeInit (DMA_Channel_TypeDef *DMAy_Channelx)
 Deinitializes the DMAy Channelx registers to their default reset values. More...
 
void DMA_Init (DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct)
 Initializes the DMAy Channelx according to the specified parameters in the DMA_InitStruct. More...
 
void DMA_StructInit (DMA_InitTypeDef *DMA_InitStruct)
 Fills each DMA_InitStruct member with its default value. More...
 
void DMA_Cmd (DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState)
 Enables or disables the specified DMAy Channelx. More...
 
void DMA_SetCurrDataCounter (DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber)
 Sets the number of data units in the current DMAy Channelx transfer. More...
 
uint16_t DMA_GetCurrDataCounter (DMA_Channel_TypeDef *DMAy_Channelx)
 Returns the number of remaining data units in the current DMAy Channelx transfer. More...
 
void DMA_ITConfig (DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState)
 Enables or disables the specified DMAy Channelx interrupts. More...
 
FlagStatus DMA_GetFlagStatus (uint32_t DMAy_FLAG)
 Checks whether the specified DMAy Channelx flag is set or not. More...
 
void DMA_ClearFlag (uint32_t DMAy_FLAG)
 Clears the DMAy Channelx's pending flags. More...
 
ITStatus DMA_GetITStatus (uint32_t DMAy_IT)
 Checks whether the specified DMAy Channelx interrupt has occurred or not. More...
 
void DMA_ClearITPendingBit (uint32_t DMAy_IT)
 Clears the DMAy Channelx's interrupt pending bits. More...
 

Detailed Description

This file provides firmware functions to manage the following functionalities of the Direct Memory Access controller (DMA):

Author
MCD Application Team
Version
V1.0.0
Date
20-September-2012
  • Initialization and Configuration
  • Data Counter
  • Interrupts and flags management
==============================================================================
                    ##### How to use this driver #####
==============================================================================
  [..]
  (#) Enable The DMA controller clock using 
      RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE) function for DMA1 or 
      using RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE) function for DMA2.
  (#) Enable and configure the peripheral to be connected to the DMA channel
     (except for internal SRAM / FLASH memories: no initialization is necessary).
  (#) For a given Channel, program the Source and Destination addresses, 
      the transfer Direction, the Buffer Size, the Peripheral and Memory 
      Incrementation mode and Data Size, the Circular or Normal mode, 
      the channel transfer Priority and the Memory-to-Memory transfer 
      mode (if needed) using the DMA_Init() function.
  (#) Enable the NVIC and the corresponding interrupt(s) using the function 
      DMA_ITConfig() if you need to use DMA interrupts.
  (#) Enable the DMA channel using the DMA_Cmd() function.
  (#) Activate the needed channel Request using PPP_DMACmd() function for 
      any PPP peripheral except internal SRAM and FLASH (ie. SPI, USART ...) 
      The function allowing this operation is provided in each PPP peripheral 
      driver (ie. SPI_DMACmd for SPI peripheral).
  (#) Optionally, you can configure the number of data to be transferred
      when the channel is disabled (ie. after each Transfer Complete event
      or when a Transfer Error occurs) using the function DMA_SetCurrDataCounter().
      And you can get the number of remaining data to be transferred using 
      the function DMA_GetCurrDataCounter() at run time (when the DMA channel is
      enabled and running).
  (#) To control DMA events you can use one of the following two methods:
      (##) Check on DMA channel flags using the function DMA_GetFlagStatus().
      (##) Use DMA interrupts through the function DMA_ITConfig() at initialization
           phase and DMA_GetITStatus() function into interrupt routines in
           communication phase.
           After checking on a flag you should clear it using DMA_ClearFlag()
           function. And after checking on an interrupt event you should 
           clear it using DMA_ClearITPendingBit() function.
Attention

© COPYRIGHT 2012 STMicroelectronics

Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:

   http://www.st.com/software_license_agreement_liberty_v2

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.