STM32F2 Standard Peripheral bibliotheek  1.0
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stm32f2xx_spi.h
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1 
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F2xx_SPI_H
31 #define __STM32F2xx_SPI_H
32 
33 #ifdef __cplusplus
34  extern "C" {
35 #endif
36 
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f2xx.h"
39 
48 /* Exported types ------------------------------------------------------------*/
49 
54 typedef struct
55 {
56  uint16_t SPI_Direction;
59  uint16_t SPI_Mode;
62  uint16_t SPI_DataSize;
65  uint16_t SPI_CPOL;
68  uint16_t SPI_CPHA;
71  uint16_t SPI_NSS;
75  uint16_t SPI_BaudRatePrescaler;
81  uint16_t SPI_FirstBit;
84  uint16_t SPI_CRCPolynomial;
85 }SPI_InitTypeDef;
86 
91 typedef struct
92 {
93 
94  uint16_t I2S_Mode;
97  uint16_t I2S_Standard;
100  uint16_t I2S_DataFormat;
103  uint16_t I2S_MCLKOutput;
106  uint32_t I2S_AudioFreq;
109  uint16_t I2S_CPOL;
111 }I2S_InitTypeDef;
112 
113 /* Exported constants --------------------------------------------------------*/
114 
119 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
120  ((PERIPH) == SPI2) || \
121  ((PERIPH) == SPI3))
122 
123 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
124  ((PERIPH) == SPI3))
125 
130 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
131 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
132 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
133 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
134 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
135  ((MODE) == SPI_Direction_2Lines_RxOnly) || \
136  ((MODE) == SPI_Direction_1Line_Rx) || \
137  ((MODE) == SPI_Direction_1Line_Tx))
138 
146 #define SPI_Mode_Master ((uint16_t)0x0104)
147 #define SPI_Mode_Slave ((uint16_t)0x0000)
148 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
149  ((MODE) == SPI_Mode_Slave))
150 
158 #define SPI_DataSize_16b ((uint16_t)0x0800)
159 #define SPI_DataSize_8b ((uint16_t)0x0000)
160 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
161  ((DATASIZE) == SPI_DataSize_8b))
162 
170 #define SPI_CPOL_Low ((uint16_t)0x0000)
171 #define SPI_CPOL_High ((uint16_t)0x0002)
172 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
173  ((CPOL) == SPI_CPOL_High))
174 
182 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
183 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
184 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
185  ((CPHA) == SPI_CPHA_2Edge))
186 
194 #define SPI_NSS_Soft ((uint16_t)0x0200)
195 #define SPI_NSS_Hard ((uint16_t)0x0000)
196 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
197  ((NSS) == SPI_NSS_Hard))
198 
206 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
207 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
208 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
209 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
210 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
211 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
212 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
213 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
214 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
215  ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
216  ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
217  ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
218  ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
219  ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
220  ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
221  ((PRESCALER) == SPI_BaudRatePrescaler_256))
222 
230 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
231 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
232 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
233  ((BIT) == SPI_FirstBit_LSB))
234 
242 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
243 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
244 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
245 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
246 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
247  ((MODE) == I2S_Mode_SlaveRx) || \
248  ((MODE) == I2S_Mode_MasterTx)|| \
249  ((MODE) == I2S_Mode_MasterRx))
250 
259 #define I2S_Standard_Phillips ((uint16_t)0x0000)
260 #define I2S_Standard_MSB ((uint16_t)0x0010)
261 #define I2S_Standard_LSB ((uint16_t)0x0020)
262 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
263 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
264 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
265  ((STANDARD) == I2S_Standard_MSB) || \
266  ((STANDARD) == I2S_Standard_LSB) || \
267  ((STANDARD) == I2S_Standard_PCMShort) || \
268  ((STANDARD) == I2S_Standard_PCMLong))
269 
277 #define I2S_DataFormat_16b ((uint16_t)0x0000)
278 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
279 #define I2S_DataFormat_24b ((uint16_t)0x0003)
280 #define I2S_DataFormat_32b ((uint16_t)0x0005)
281 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
282  ((FORMAT) == I2S_DataFormat_16bextended) || \
283  ((FORMAT) == I2S_DataFormat_24b) || \
284  ((FORMAT) == I2S_DataFormat_32b))
285 
293 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
294 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
295 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
296  ((OUTPUT) == I2S_MCLKOutput_Disable))
297 
305 #define I2S_AudioFreq_192k ((uint32_t)192000)
306 #define I2S_AudioFreq_96k ((uint32_t)96000)
307 #define I2S_AudioFreq_48k ((uint32_t)48000)
308 #define I2S_AudioFreq_44k ((uint32_t)44100)
309 #define I2S_AudioFreq_32k ((uint32_t)32000)
310 #define I2S_AudioFreq_22k ((uint32_t)22050)
311 #define I2S_AudioFreq_16k ((uint32_t)16000)
312 #define I2S_AudioFreq_11k ((uint32_t)11025)
313 #define I2S_AudioFreq_8k ((uint32_t)8000)
314 #define I2S_AudioFreq_Default ((uint32_t)2)
315 
316 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
317  ((FREQ) <= I2S_AudioFreq_192k)) || \
318  ((FREQ) == I2S_AudioFreq_Default))
319 
327 #define I2S_CPOL_Low ((uint16_t)0x0000)
328 #define I2S_CPOL_High ((uint16_t)0x0008)
329 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
330  ((CPOL) == I2S_CPOL_High))
331 
339 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
340 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
341 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
342 
350 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
351 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
352 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
353  ((INTERNAL) == SPI_NSSInternalSoft_Reset))
354 
362 #define SPI_CRC_Tx ((uint8_t)0x00)
363 #define SPI_CRC_Rx ((uint8_t)0x01)
364 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
365 
373 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
374 #define SPI_Direction_Tx ((uint16_t)0x4000)
375 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
376  ((DIRECTION) == SPI_Direction_Tx))
377 
385 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
386 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
387 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
388 #define I2S_IT_UDR ((uint8_t)0x53)
389 #define SPI_I2S_IT_TIFRFE ((uint8_t)0x58)
390 
391 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
392  ((IT) == SPI_I2S_IT_RXNE) || \
393  ((IT) == SPI_I2S_IT_ERR))
394 
395 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
396 #define SPI_IT_MODF ((uint8_t)0x55)
397 #define SPI_IT_CRCERR ((uint8_t)0x54)
398 
399 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
400 
401 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE)|| ((IT) == SPI_I2S_IT_TXE) || \
402  ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \
403  ((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\
404  ((IT) == SPI_I2S_IT_TIFRFE))
405 
413 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
414 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
415 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
416 #define I2S_FLAG_UDR ((uint16_t)0x0008)
417 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
418 #define SPI_FLAG_MODF ((uint16_t)0x0020)
419 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
420 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
421 #define SPI_I2S_FLAG_TIFRFE ((uint16_t)0x0100)
422 
423 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
424 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
425  ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
426  ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
427  ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
428  ((FLAG) == SPI_I2S_FLAG_TIFRFE))
429 
437 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
438 
446 #define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
447 #define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
448 #define SPI_IT_TXE SPI_I2S_IT_TXE
449 #define SPI_IT_RXNE SPI_I2S_IT_RXNE
450 #define SPI_IT_ERR SPI_I2S_IT_ERR
451 #define SPI_IT_OVR SPI_I2S_IT_OVR
452 #define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
453 #define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
454 #define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
455 #define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
456 #define SPI_DeInit SPI_I2S_DeInit
457 #define SPI_ITConfig SPI_I2S_ITConfig
458 #define SPI_DMACmd SPI_I2S_DMACmd
459 #define SPI_SendData SPI_I2S_SendData
460 #define SPI_ReceiveData SPI_I2S_ReceiveData
461 #define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
462 #define SPI_ClearFlag SPI_I2S_ClearFlag
463 #define SPI_GetITStatus SPI_I2S_GetITStatus
464 #define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
465 
473 /* Exported macro ------------------------------------------------------------*/
474 /* Exported functions --------------------------------------------------------*/
475 
476 /* Function used to set the SPI configuration to the default reset state *****/
477 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
478 
479 /* Initialization and Configuration functions *********************************/
480 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
481 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
482 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
483 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
484 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
485 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
486 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
487 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
488 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
489 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
490 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
491 
492 /* Data transfers functions ***************************************************/
493 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
494 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
495 
496 /* Hardware CRC Calculation functions *****************************************/
497 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
498 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
499 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
500 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
501 
502 /* DMA transfers management functions *****************************************/
503 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
504 
505 /* Interrupts and flags management functions **********************************/
506 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
507 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
508 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
509 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
510 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
511 
512 #ifdef __cplusplus
513 }
514 #endif
515 
516 #endif /*__STM32F2xx_SPI_H */
517 
526 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/