STM32F1 Standard Peripheral bibliotheek  1.0
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stm32f10x_spi.h
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1 
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __STM32F10x_SPI_H
24 #define __STM32F10x_SPI_H
25 
26 #ifdef __cplusplus
27  extern "C" {
28 #endif
29 
30 /* Includes ------------------------------------------------------------------*/
31 #include "stm32f10x.h"
32 
49 typedef struct
50 {
51  uint16_t SPI_Direction;
54  uint16_t SPI_Mode;
57  uint16_t SPI_DataSize;
60  uint16_t SPI_CPOL;
63  uint16_t SPI_CPHA;
66  uint16_t SPI_NSS;
70  uint16_t SPI_BaudRatePrescaler;
76  uint16_t SPI_FirstBit;
79  uint16_t SPI_CRCPolynomial;
80 }SPI_InitTypeDef;
81 
86 typedef struct
87 {
88 
89  uint16_t I2S_Mode;
92  uint16_t I2S_Standard;
95  uint16_t I2S_DataFormat;
98  uint16_t I2S_MCLKOutput;
101  uint32_t I2S_AudioFreq;
104  uint16_t I2S_CPOL;
106 }I2S_InitTypeDef;
107 
116 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
117  ((PERIPH) == SPI2) || \
118  ((PERIPH) == SPI3))
119 
120 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
121  ((PERIPH) == SPI3))
122 
127 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
128 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
129 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
130 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
131 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
132  ((MODE) == SPI_Direction_2Lines_RxOnly) || \
133  ((MODE) == SPI_Direction_1Line_Rx) || \
134  ((MODE) == SPI_Direction_1Line_Tx))
135 
143 #define SPI_Mode_Master ((uint16_t)0x0104)
144 #define SPI_Mode_Slave ((uint16_t)0x0000)
145 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
146  ((MODE) == SPI_Mode_Slave))
147 
155 #define SPI_DataSize_16b ((uint16_t)0x0800)
156 #define SPI_DataSize_8b ((uint16_t)0x0000)
157 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
158  ((DATASIZE) == SPI_DataSize_8b))
159 
167 #define SPI_CPOL_Low ((uint16_t)0x0000)
168 #define SPI_CPOL_High ((uint16_t)0x0002)
169 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
170  ((CPOL) == SPI_CPOL_High))
171 
179 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
180 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
181 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
182  ((CPHA) == SPI_CPHA_2Edge))
183 
191 #define SPI_NSS_Soft ((uint16_t)0x0200)
192 #define SPI_NSS_Hard ((uint16_t)0x0000)
193 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
194  ((NSS) == SPI_NSS_Hard))
195 
203 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
204 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
205 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
206 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
207 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
208 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
209 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
210 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
211 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
212  ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
213  ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
214  ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
215  ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
216  ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
217  ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
218  ((PRESCALER) == SPI_BaudRatePrescaler_256))
219 
227 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
228 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
229 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
230  ((BIT) == SPI_FirstBit_LSB))
231 
239 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
240 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
241 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
242 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
243 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
244  ((MODE) == I2S_Mode_SlaveRx) || \
245  ((MODE) == I2S_Mode_MasterTx) || \
246  ((MODE) == I2S_Mode_MasterRx) )
247 
255 #define I2S_Standard_Phillips ((uint16_t)0x0000)
256 #define I2S_Standard_MSB ((uint16_t)0x0010)
257 #define I2S_Standard_LSB ((uint16_t)0x0020)
258 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
259 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
260 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
261  ((STANDARD) == I2S_Standard_MSB) || \
262  ((STANDARD) == I2S_Standard_LSB) || \
263  ((STANDARD) == I2S_Standard_PCMShort) || \
264  ((STANDARD) == I2S_Standard_PCMLong))
265 
273 #define I2S_DataFormat_16b ((uint16_t)0x0000)
274 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
275 #define I2S_DataFormat_24b ((uint16_t)0x0003)
276 #define I2S_DataFormat_32b ((uint16_t)0x0005)
277 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
278  ((FORMAT) == I2S_DataFormat_16bextended) || \
279  ((FORMAT) == I2S_DataFormat_24b) || \
280  ((FORMAT) == I2S_DataFormat_32b))
281 
289 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
290 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
291 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
292  ((OUTPUT) == I2S_MCLKOutput_Disable))
293 
301 #define I2S_AudioFreq_96k ((uint32_t)96000)
302 #define I2S_AudioFreq_48k ((uint32_t)48000)
303 #define I2S_AudioFreq_44k ((uint32_t)44100)
304 #define I2S_AudioFreq_32k ((uint32_t)32000)
305 #define I2S_AudioFreq_22k ((uint32_t)22050)
306 #define I2S_AudioFreq_16k ((uint32_t)16000)
307 #define I2S_AudioFreq_11k ((uint32_t)11025)
308 #define I2S_AudioFreq_8k ((uint32_t)8000)
309 #define I2S_AudioFreq_Default ((uint32_t)2)
310 #define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_96k) || \
311  ((FREQ) == I2S_AudioFreq_48k) || \
312  ((FREQ) == I2S_AudioFreq_44k) || \
313  ((FREQ) == I2S_AudioFreq_32k) || \
314  ((FREQ) == I2S_AudioFreq_22k) || \
315  ((FREQ) == I2S_AudioFreq_16k) || \
316  ((FREQ) == I2S_AudioFreq_11k) || \
317  ((FREQ) == I2S_AudioFreq_8k) || \
318  ((FREQ) == I2S_AudioFreq_Default))
319 
327 #define I2S_CPOL_Low ((uint16_t)0x0000)
328 #define I2S_CPOL_High ((uint16_t)0x0008)
329 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
330  ((CPOL) == I2S_CPOL_High))
331 
339 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
340 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
341 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
342 
350 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
351 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
352 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
353  ((INTERNAL) == SPI_NSSInternalSoft_Reset))
354 
362 #define SPI_CRC_Tx ((uint8_t)0x00)
363 #define SPI_CRC_Rx ((uint8_t)0x01)
364 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
365 
373 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
374 #define SPI_Direction_Tx ((uint16_t)0x4000)
375 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
376  ((DIRECTION) == SPI_Direction_Tx))
377 
385 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
386 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
387 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
388 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
389  ((IT) == SPI_I2S_IT_RXNE) || \
390  ((IT) == SPI_I2S_IT_ERR))
391 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
392 #define SPI_IT_MODF ((uint8_t)0x55)
393 #define SPI_IT_CRCERR ((uint8_t)0x54)
394 #define I2S_IT_UDR ((uint8_t)0x53)
395 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
396 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
397  ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
398  ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
399 
407 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
408 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
409 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
410 #define I2S_FLAG_UDR ((uint16_t)0x0008)
411 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
412 #define SPI_FLAG_MODF ((uint16_t)0x0020)
413 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
414 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
415 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
416 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
417  ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
418  ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
419  ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
420 
428 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
429 
449 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
450 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
451 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
452 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
453 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
454 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
455 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
456 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
457 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
458 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
459 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
460 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
461 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
462 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
463 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
464 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
465 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
466 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
467 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
468 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
469 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
470 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
471 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
472 
473 #ifdef __cplusplus
474 }
475 #endif
476 
477 #endif /*__STM32F10x_SPI_H */
478 
490 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/